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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. mos integrated circuit pd168001 monolithic 4-channel h bridge + + + + low-side switch document no. s15728ej1v0ds00 (1st edition) date published march 2003 n cp(k) printed in japan data sheet ? ` description the pd168001 is a monolithic 4-channel h bridge driver and low-side switch ic that uses a power mosfet at the output stage. because of the mosfet at the output stage, both the inputs and outputs are interfaced by pwm digital signals, and the power consumption can therefore be lowered. a 30-pin thin shrink sop is employed as the package to help to create a small and thin set. features o four h bridge circuits using power mosfet and low-side switch o low on-resistance 4-ch h bridge: 2 ? max. (sum of upper and lower stages) low-side switch: 2 ? max. o high-speed pwm drive: operating frequency up to 120 khz o thin 30-pin shrink sop (7.62 mm (300) with 0.65 mm pitch) ordering information part number package pd168001mc-6a4-a 30-pin plastic tssop (7.62 mm (300))
data sheet s15728ej1v0ds 2 pd168001 block diagram v dd sel 2 3 in1a 4 in1b 5 in2a 6 in2b 1 30 in3a 29 in3b 28 in4a 27 in4b 26 in5 v m out1a 8 out1b 23 out2a 10 out2b 21 out3a 12 out3b 19 out4a 14 out4b 17 out5 gnd 25 (9,13,18,22) (7,11,15,16,20,24) controller 1 h bridge 1 h bridge 2 h bridge 3 h bridge 4 controller 2 controller 3 controller 4 controller 5
data sheet s15728ej1v0ds 3 pd168001 pin configuration package: 30-pin tssop (7.62 mm with 0.65 mm pitch) 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 in3a in3b in4a in4b in5 out5 gnd out1b v m out2b gnd out3b v m out4b gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 v dd sel in1a in1b in2a in2b gnd out1a v m out2a gnd out3a v m out4a gnd
data sheet s15728ej1v0ds 4 pd168001 pin function pin no. pin name pin function 1v dd logic power supply 2 sel control pin 3 in1a channel 1 input pin a 4 in1b channel 1 input pin b 5 in2a channel 2 input pin a 6 in2b channel 2 input pin b 7 gnd gnd pin 8 out1a channel 1 output pin a 9v m motor power supply pin 10 out2a channel 2 output pin a 11 gnd gnd pin 12 out3a channel 3 output pin a 13 v m motor power supply pin 14 out4a channel 4 output pin a 15 gnd gnd pin 16 gnd gnd pin 17 out4b channel 4 output pin b 18 v m motor power supply pin 19 out3b channel 3 output pin b 20 gnd gnd pin 21 out2b channel 2 output pin b 22 v m motor power supply pin 23 out1b channel 1 output pin b 24 gnd gnd pin 25 out5 channel 5 output pin 26 in5 channel 5 input pin 27 in4b channel 4 input pin b 28 in4a channel 4 input pin a 29 in3b channel 3 input pin b 30 in3a channel 3 input pin a
data sheet s15728ej1v0ds 5 pd168001 function specifications (1) revolution control a high-level/low-level binary signal is input to the h bridge driver block incorporating 4 outputs. the truth table of the input logic is shown below. v m v dd in1a to 4a in1b to 4b out1a to 4a out1b to 4b sel function table (common to all channels) input output in1a to in4a in1b to in4b sel 1a to 4a 1b to 4b llhll hlhhl lhhlh hhhhh ?? l hi-z hi-z
data sheet s15728ej1v0ds 6 pd168001 (2) switching of h bridges when output a is switched in the figure shown on the right, a dead time (time for which both pch and nch are off) elapses to prevent through current. consequently, the waveform of output a (rise time, fall time, and delay time) changes depending on whether output b is fixed to the high or low level. the figure below shows the voltage waveform of output b in response to an input waveform when output b is fixed to the low level and the high level. rise delay time (t tlh ) input a waveform output a when output b is fixed to low level output a when output b is fixed to low level fall delay time (t thl ) rise time (t tlh ) fall time (t thl ) dead time dead time ? when output b is fixed to low level output a goes into a high-impedance state and is undefined during the dead time period, but a low level is output to output a because output b is pulled down by the load ? when output b is fixed to high level output a goes into a high-impedance state and is undefined during the dead time period, but a high level is output to output a because output b is pulled up by the load. nch pch nch pch v m ab
data sheet s15728ej1v0ds 7 pd168001 (3) low-side switch the low-side switch of ch 5 has an output stage configured of an n-ch mosfet. its input is a high-level/low-level binary signal. the truth table of the input logic is shown below. m v m v dd in5 sel function table (channel 5) input output in5 sel out5 l h hi-z (output off) h h l (ouput on) ? l hi-z (output off) (4) power sequence this ic has logic power supply (v dd ) and output power supply (v m ) pins. the power sequence of these pins must be as follows. turn on v m with v dd turned on to turn on power. to turn off power, turn off v m with v dd turned on, and then turn off v dd . (however, v dd and v m can be turned off at the same time.) cautions 1. because this ic switches a high current at high speeds, surge may be generated by v m , gnd wiring, and inductance, degrading the ic. on the pwb, widen and shorten the pattern width of the gnd lines as much as possible, and locate bypass capacitors between v m and gnd as close to the ic as possible. connect two capacitors in parallel: a magnetic capacitor with a low inductance (4700 pf or more) and an electrolytic capacitor of 10 f or more, depending on the load current. 2. when a load such as a dc motor is connected to ch 5 and the switch is turned off, a counter electromotive force is generated. if the absolute maximum rating of the output pin voltage may be exceeded by the voltage applied to the load, be sure to connect a schottky barrier diode to both the ends of the load to prevent the rating of the output pin voltage from being exceeded.
data sheet s15728ej1v0ds 8 pd168001 absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit v dd control block ? 0.5 to +6.0 v power supply voltage v m motor block ? 0.5 to +6.0 v input voltage v in ? 0.5 to v dd +0.5 v output pin voltage v out 6.0 v dc output current i dd dc 0.3 a/ch instantaneous output current note 1 i dp when two or more channels are turned on at the same time pw 50 ms, duty 5% 1.0 a/ch power consumption note 2 p t 1.0 w peak junction temperature t ch(max) 150 c storage temperature t stg ? 55 to 150 c notes 1. duty indicates the period during which a current flows, exceeding i dd for the entire sequence 2. when mounted on a glass epoxy board (100 mm 100 mm 1 mm, with a copper foil area of 15%) recommended operating conditions parameter symbol conditions min. typ. max. unit v dd control block 3.0 3.3 3.6 v power supply voltage v mact motor block 4.5 5.0 5.5 v input voltage v in 0v dd v dc output current i dd dc 0.2 a/ch instantaneous output current i dp when two or more channels are turned on at the same time pw 50 ms, duty 5% 0.85 a/ch operating frequency f in 120 khz operating temperature range t a 075 c
data sheet s15728ej1v0ds 9 pd168001 electrical characteristics (unless otherwise specified, v dd = 3.3 v, v m = 5 v, t a = 25 c) parameter symbol conditions min. typ. max. unit 1. dc characteristics v m pin current i m sel = l 10 a v dd pin current i dz(off) sel = l 10 a input pull-down resistance r in in and sel pins 50 200 k ? high-level input voltage v ih in and sel pins 0.7 v dd v dd v low-level input voltage v il in and sel pins ? 0.3 0.3 v dd v high-level input current i ih v in = v dd 80 a low-level input current i il v in = 0 v ? 2.0 a on-resistance (ch1 to 4, sum of upper and lower stages) r on i d = 0.2 a 2.0 ? on-resistance (ch 5) r on i d = 0.2 a 2.0 ? switching current with no load on h bridge note i s(ave) input frequency: 100 khz 4.5 ma 2. ac characteristics rise delay time t tlh 150 400 800 rise time t tlh1 35 250 500 with output of one side fixed to low fall time t thl1 35 75 150 fall delay time t thl 150 500 800 rise time t thl2 35 75 150 1 to 4ch with output of one side fixed to high fall time t thl2 35 300 600 rise time t tlh3 100 200 5ch fall time t thl3 load: 20 ? input frequency: 1 khz 50 100 ns note average value of current consumed inside the h bridge when the switching operation is performed without a load.
data sheet s15728ej1v0ds 10 pd168001 timing charts ? channel 1 to channel 4 50% 50% 50% fall delay time fall delay time t thl fall time t thl1 10% 10% 90% 90% 50% rise time t tlh1 50% fall time t thl2 10% 90% 50% when output b is fixed to low level when output b is fixed to high level input waveform at a voltage wavefrom at a input waveform at a voltage wavefrom at a rise delay time t tlh 50% 10% 90% 50% rise time t tlh2 rise delay time ? channel 5 10% 10% 90% rise time t tlh3 rise time t tlh3 90% input waveform output waveform
data sheet s15728ej1v0ds 11 pd168001 power consumption characteristics 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1.0 w 0 ?0 25 50 75 100 125 150 ambient temperature t a ( c) 100 mm 100 mm 1.0 mm when mounted on a glass epoxy board 25 c 75 c 125 c/w p t -t a characteristics power consumption p t (w)
data sheet s15728ej1v0ds 12 pd168001 1 0.8 0.6 0.4 0.2 0 100 1020304050607080 v dd = 3.6 v i dz (off) -t a characteristics ambient temperature t a ( c) v dd current i dz (off) ( a) r on1 , r on2 characteristics ambient temperature t a ( c) on resistance r on1, r on2 ( ? ) r in -t a characteristics ambient temperature t a ( c) input pull-down resistance r in ( ? ) r in -v dd characteristics supply voltage v dd (v) input pull-down resistance r in ( ? ) r on1 , r on2 -v m characteristics supply voltage t m (v) on resistance r on1, r on2 ( ? ) i dz (off) -v dd characteristics supply voltage v dd (v) v dd current i dz (off) ( a) 2 1.5 1 0.5 0 100 1020304050607080 v dd = 3.6 v 150 140 130 120 100 110 100 1020304050607080 v dd = 3.6 v 150 140 130 120 100 110 2.8 3 3.2 3.4 3.6 3.8 t a = 25 c 1 0.8 0.6 0.4 0.2 0 2.8 3 3.2 3.4 3.6 3.8 t a = 25 c r on1 r on2 2 1.5 1 0.5 0 4.4 4.6 4.8 5 5.2 5.4 5.6 t a = 25 c r on1 r on2
data sheet s15728ej1v0ds 13 pd168001 3 2.5 2 1.5 1 0 0.5 100 1020304050607080 v dd = 3.6 v 800 600 400 0 200 100 1020304050607080 v dd = 3.6 v 500 400 300 0 100 200 100 1020304050607080 v dd = 3.6 v 3 2.5 2 1.5 1 0 0.5 2.8 3 3.2 3.4 3.6 3.8 t a = 25 c t thl t thl2 t tlh t tlh2 200 150 0 50 100 100 1020304050607080 v dd = 3.6 v t thl3 t tlh3 400 300 200 0 100 100 1020304050607080 v dd = 3.6 v t thl1 t tlh1 v ih v ih v il v il v ih , v il -t a characteristics ambient temperature t a ( c) hi/low level input voltage v ih , v il (v) t tlh , t thl -t a characteristics ambient temperature t a ( c) rising/falling delay time t tlh , t thl (ns) t tlh2 , t thl2 -t a characteristics ambient temperature t a ( c) rising/falling time t tlh2 , t thl2 (ns) t tlh3 , t thl3 -t a characteristics ambient temperature t a ( c) rising/falling time t tlh2 , t thl2 (ns) t tlh1 , t thl1 -t a characteristics ambient temperature t a ( c) rising/falling time t tlh1 , t thl1 (ns) v ih , v il -v dd characteristics supply voltage t dd (v) hi/low level input voltage v ih , v il (v)
data sheet s15728ej1v0ds 14 pd168001 package drawing s j t g d e f c b k p l u n item millimeters b c i 0.65 (t.p.) 0.375 l 0.10 0.5 6.1 0.1 m 0.10 n 30-pin plastic tssop (7.62mm(300)) a 9.85 0.10 a' 9.7 0.1 k 0.145 0.025 note each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition. d 0.1 0.05 0.24 0.05 e 1.2 max. f g h 8.1 0.1 1.0 0.05 j 1.0 0.1 s30mc-65-6a4 p3 + 5 ? 3 30 16 115 detail of lead end m m 0.25 t 0.6 0.15 u s h i a a'
data sheet s15728ej1v0ds 15 pd168001 recommended soldering conditions the pd168001 should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than those recommended below, contact an nec electronics sales representative. for technical information, see the following website. semiconductor device mount manual (http://www.necel.com/pkg/en/mount/index.html) pd168001mc-6a4-a 30pin plastic tssop (7.62mm (300)) soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 260 c, time: 60 seconds max. (at 220 c or higher), count: three times or less, exposure limit: none, flux: rosin flux with low chlorine (0.2 wt% or below) recommended ir60-00-3 caution do not use different soldering methods together (except for partial heating).
data sheet s15728ej1v0ds 16 pd168001 [memo]
data sheet s15728ej1v0ds 17 pd168001 [memo]
data sheet s15728ej1v0ds 18 pd168001 [memo]
data sheet s15728ej1v0ds 19 pd168001 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
pd168001 the information in this document is current as of march, 2003. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual pr operty rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third pa rties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a pa rticular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "special": tr ansportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if cust omers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. (2) "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). ? ? ? ? ? ? m8e 02. 11-1

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